Homework 5

Q1. (2pts) Consider the logic gate circuit shown below.

Q1-1. To derive a Boolean equation for x.

x =

Q1-2. Simplify the equation, using the Boolean algebra for output x.

x =

Q2. (9pts) Design a combinational circuit system.

Design a combinational circuit with three inputs x, y, z, and three outputs A, B, C. Note that both xyz and

ABC represent a three bit binary number where x and A are MSB, whereas z and C are LSB. When a

binary input xyz is 0, 1, 2, or 3, the binary output ABC is two greater than the input xyz. When the binary

input is 4, 5, 6, or 7, the binary output ABC is one less than the input. xyz.

Please answer all of the following sub-questions.

Q2-1. (1pt) Draw a truth table of inputs xyz and outputs ABC.

Inputs Outputs

x y z A B C

m

n

p

q

x

Q2-2. (3pts) Based on the truth table you draw, build a Karnaugh map for each output of A, B, and C. In

other words, you have to draw A’s K-map, B’s K-map, and C’s K-map respectively.

A’s K-map

xy

z

00 01 11 10

0

1

B’s K-map

xy

z

00 01 11 10

0

1

C’s K-map

xy

z

00 01 11 10

0

1

Q2-3. (3pts) Derive (as simple as possible) Boolean equations for A,B,C using the Karnaugh maps.

A =

B =

C =

Q2-4. (1pt) Based on the Boolean equations, draw the logical gate diagram (circuit) for this system in

Logisim. Copy and paste the circuit (or capture the diagram) in your submission. (No .circ file

is necessary.)

Q2-5. (1pt) Test your circuit with the Logisim simulation and generate the truth table (In logisim, project–

>analyze circuit–>table). Copy and paste the table (or capture the table) in your submission.

Q3. (9pts) Design a 2-bit by 2-bit multiplier.

In the class, we discussed about how to build a 2-bit by 2-bit multiplier using two half adders. (See page 15

of slide deck 10. CpuComponentAluDesign.pptx). To eliminate a propagation delay with a ripple carry,

design the same multiplier through KMaps, thus without cascading two half adders.

Q3-1. (1pt) Fill out the following truth table.

A * B = C A1 A0 B1 B0 C3 C2 C1 C0

0 0 0

0 1 0

0 2 0

0 3 0

1 0 0

1 1 1

1 2 2

1 3 3

2 0 0

2 1 2

2 2 4

2 3 6

3 0 0

3 1 3

3 2 6

3 3 9

Q3-2. (2pts) From the truth table, derive the Boolean equations, each representing C0 and C3

Their Boolean equations are too simple to use a KMap.

C0 =

C3 =

Q3-3. (2pt) Draw a KMap for C2. Derive the Boolean equation to represent C2.

B1B0

A1A0

00 01 11 10

00

01

11

10

C2 =

Q3-4. (2pt) Draw a KMap for C1. Derive the Boolean equation to represent C1.

B1B0

A1A0

00 01 11 10

00

01

11

10

C1 =

Q3-5. (1pt) Based on the Boolean equations, draw this multiplier logic in Logisim. Copy and paste the

circuit (or capture the diagram) in your submission. (No .circ file is necessary.)

Q3-6. (1pt) Test your circuit with the Logisim simulation and generate the truth table. Copy and paste the

table (or capture the table) in your submission

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